Apr 23, 2024 · In this paper, we propose and fabricate an electrically symmetric memory cell based on a physically isolated 2T2R structure for IMC. This design aims to enhance the precision and density of RRAM-based IMC arrays.

This work proposes a 2T2R resistive random access memory (ReRAM) architecture that supports three types of CIM operations: 1) ternary content addressable memory (TCAM); 2) logic in-memory (LiM) primitives and arithmetic blocks such as full adder (FA) and full subtractor; and 3) in-memory dot-product for neural networks.

Nov 6, 2023 · The third layer of 1T1R buffer and two-transistor-two-resistor (2T2R) TCAM arrays was fabricated with Ta 2 O 5-based digital RRAM and CNTFET to implement template storing and matching. The...

Oct 1, 2022 · This paper elaborates a 2-transistor -2-resistor (2T2R) RRAM PUF scheme with assisting circuit techniques for dense and reliable cryptographic key generation and storage. The set time mismatch in two adjacent RRAM devices is utilized to enhance the tolerance of PUF output for against PVTA variations.

Mar 15, 2019 · Here, we show that two-transistor–two-resistor (2T2R) transition metal dichalcogenide TCAM (TMD-TCAM) cells can be created by integrating single-layer MoS 2 transistors with metal-oxide...

This study aims to build a 2T2R RRAM cell with reduced power dissipation compared to various RRAM and SRAM cells. The Project used Cadence Virtuoso to simulate in 90nm Technology. The proposed 2T2R structure and analyze the elements that …

isolated 2T2R structure for IMC. This design aims to enhance the precision and density of RRAM-based IMC arrays. The 2T2R cells are manufactured using the back-end-of-line (BEOL) process of a commercial 40 nm technology platform. The feasibility of this design is verified through measured and simulated results,

The in-memory hyperdimensional encoding has been achieved by performing binding/bundling in the 2T2R RRAM array and permutation on specially designed digital peripheral circuits.

Mar 19, 2021 · To address these issues, we propose voltage-division (VD) based computing approach and its circuit implementation in two-transistor-two-resistor (2T2R) RRAM cell arrays, which can realize energy-efficient, sign-aware, and robust deep neural network (DNN) processing.

Jun 6, 2022 · A 2T2R current race (CR) based ternary content addressable memory (TCAM) design is proposed using resistive random-access memory (RRAM) technology. The suggested design adopts a match-line (ML) booster feature in sensing amplifier to improve search speed and tolerance to RRAM switching variations.