The PowerPC 604ev, 604r or "Mach 5" was introduced in August 1997 and was essentially a 604e fabricated by IBM and Motorola with a newer process, reaching higher speeds with a lower energy consumption.

rPC family of reduced instruction set computer (RISC) microprocessors. The 604e implements the PowerPC architecture as it is specified for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits, and floating-poin.

The “power user” second generation PowerPC (PPC) CPU was the 604, unveiled in December 1994 along with the 603. Containing 3.6 million transistors, drawing twice the power of the 601, and with a dual L1 cache (16 KB for instructions, 16 KB for data), this workhorse could deal with four instructions per cycle.

This section summarizes features of the 604e’s implementation of the PowerPC architecture. Major features of the 604e are as follows: High-performance, superscalar microprocessor — As many as four instructions can be issued per clock — As many as seven instructions can start executing per clock (including three integer instructions ...

The PowerPC 604 was designed for high-end workstations and supported multiprocessor configurations. It featured an 16 KB instruction cache and 16KB data cache, twice as much as early PowerPC 603 processors.

Oct 11, 2024 · PowerPC 604e Improves performance over the 604 with additional L1 cache and faster clock speeds. In 1995, Motorola and IBM announced an extended version of the 604 chip, called the 604e processor. This processor is for use in high-performance power Macs and for upgrades to existing 601 Power Macs.

CPU DB v1.2.11-91-g08f4748 Stanford VLSI Group

The PID9t-604e microprocessor is an implementation of the PowerPCTMfamily of reduced instruction set computer (RISC) microprocessors. In this document, the term “604e” and “PID9t-604e” are used as an abbreviation for the phrase “PowerPC 604e microprocessor.” This document contains pertinent physical characteristics of the PID9t-604e.

IBM introduced today an enhanced PowerPC 604e at 233 MHz that employs a new IBM manufacturing process technology, making the new chip about 35 percent smaller, but more powerful, than its predecessor.

The 604e implements the PowerPC architecture as it is specified for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits, and floating-point data types of 32 and 64 bits (single-precision and double-precision).