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Solved: native cs and gpio cs in spi - imx6 - NXP Community
Jan 9, 2018 · Hello, We are using four ecspi from imx6ul.When i used cs as gpio then everything works fine. But when i used CS as native. It wont work. Following configuration i have done for native CS in dts as, &ecspi1 { fsl,spi-num-chipselects = <1>; cs-gpios = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_spi_cs1>; status = "okay";
Solved: i.MX6 ECSPI single burst transfers - NXP Community
Jul 18, 2013 · I would recommend to probe the ecspi status register (ECSPIx_STATREG ) when it hangs to see the Rx/Tx status in the two cases (SS_CTL set vs cleared). This may shed light on what to do to fix the spi_imx driver. You are correct, in …
Solved: CS not working as GPIO, just native - NXP Community
May 18, 2020 · The spi_imx driver goes through the cs_gpios and just for the one valid, it requests the numbered gpio. So, because there is the error, the gpio is not requested and the native CS is used.
How to enable multiple CS on spidev in IMX6ULL
Feb 25, 2020 · In short you’ll need to create multiple spidev nodes under the ecspi node you want to use, one for each CS you plan to add. Some points to note. Make sure the pins you are using as additional CS are not being used by other interfaces, in …
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[PATCH] spi: imx: Implement support for CS_WORD
Jul 27, 2021 · On a board with a Ti ADS7950 8 channel ADC. This patch reduces the time to read out all channels once from 280 us to 20 us.
linux/drivers/spi/spi-imx.c at master · torvalds/linux · GitHub
When * using gpio chip selects the cs values passed into the macros below can go * outside the range 0 - 3. We therefore need to limit the cs value to avoid * corrupting bits outside the …