8V34S208I - 1:8 LVDS Fanout Buffer with 2-Input Multiplexer for 1PPS …
The 8V34S208 is a differential 1:8 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock/1PPS, 2kHz, and …
8P34S1102 - 1:2 LVDS 1.8V/2.5V Fanout Buffer for 1PPS and High …
The 8P34S1102 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase noise clock and data …
Conversion of a 1PPS GPS Signal to LVDS? - EngineerZone
Jan 13, 2020 · The 1PPS GPS signal is defined in ICD-GPS-060B and is logical 1 at 10V or logical 0 at 0V. I have this 1PPS signal coming in as a differential input (1PPS+/1PPS-) …
The 8V34S208 is a differential 1:8 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock /1PPS, 2kHz and …
Conversion of a 1PPS GPS Signal to LVDS? : r/ECE - Reddit
Jan 13, 2020 · I am wondering if anyone has experience or thoughts on converting a 1PPS signal to LVDS or even LVTTL. The 1PPS GPS signal is defined in ICD-GPS-060B and is logical 1 at …
GNSS Locked 10 MHz Reference Featuring Three 10 MHz Sine and Three 1PPS ...
Unique in the industry, the NR3606 provides three 10 MHz sine outputs and three 1PPS outputs. It also provides a 10 MHz LVDS and 1PPS LVDS output. Ideally suited for applications …
10 MHz Reference Featuring Three 10 MHz Sine and Three Synthesized 1PPS ...
Unique in the industry, the NR3606-O provides three 10 MHz sine outputs and three 1PPS outputs. It also provides a 10 MHz LVDS and 1PPS LVDS output. Ideally suited for …
1:4 LVDS Fanout Buffer, Universal Differential and TTL Inputs
The PRL-424LV is a 1:4 fanout, complementary output, LVDS line driver. It has a floating 100 Ω universal differential input suitable for accepting LVDS, LVPECL, NECL, or RS-422 signals.
8P34S1204-1 - 2:4 LVDS 1.8V/2.5V Fanout Buffer for 1PPS and
The 8P34S1204-1 is a 2:4 1.8V/2.5V high-performance differential LVDS fanout buffer for 1PPS and high-speed clocks with individual OE control.
LC_1x1 - NAELCOM
LC_1x1 provides an OCXO-sourced low-jitter 1PPS LVDS or CMOS output that has a stability of better than 30ns rms (typ. <10ns rms), and a high-accuracy LVDS or CMOS 10MHz Output.