These I/O PADs are compliant with the eMMC 5.1 HS400 specification for use in TSMC’s 28nm HPM process. The I/O PADs integrate seamlessly with Arasan’s eMMC 5.1 host controller IP. These PADs address ...

The eMMC 5.1 Memory controller is compliant with the latest eMMC 5.1 specification released by JEDEC. The controller provides a peak bandwidth of 104MB/s and supports all of the security features ...