Buckle up. PCIe needs TX pairs connected to RX on another end, like UART – and this is non-negotiable. Connectors will use host-side naming, and vice-versa. As the diagram demonstrates ...

The Renesas PCIe 4.0 Dual Mode Link Controller IP is compliant with the "PCI Express (PCIe) 4.0 Base Specification". This IP supports the major functions required as PCIe link IP for embedded systems.

The below diagram shows the connection for loopback mode and the path accessed while doing a memory transaction. The path accessed in above transaction is as follows: SYSTEM_CORE → CROSSBAR → PCIE → ...