Pushing the timing parameters of SDRAM to the practical limit resulted in the PC133 SDRAM that increased the channel frequency to 133MHz. By the late 1990s, JEDEC had a solid DRAM roadmap. Beginning ...

Uses hub architecture like the 820, but supports PC100 and PC133 SDRAM. Also provides dual ATA-100 control and integrated Ethernet. Second generation of I/O controller hub (ICH2). - Based on 440BX ...