The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for D-PHY v2.5. The PHY can be configured as ... The ...

The first attempt was using Toshiba’s TC358870XBG ASIC, capable of driving screens over MIPI DSI 1.1 from an HDMI input. [peng-zhihui] designed a simple test module for the chip based on the ...

As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI (camera serial interface) IP blocks are now bundled with the IDE to be used freely with Xilinx FPGAs.

Innosilicon MIPI DSI Transmitter implements the DSI protocol as well as MIPI D-PHY protocol. The DSI link protocol specification is a part of group of communication protocols defined by MIPI Alliance ...

Microchip has recently released the SAMA7D65 MPU, a high-performance Arm Cortex-A7 embedded processor designed for HMI and ...