[Skylark] converted a pair of defective HDTV processing boards into his very own FPGA SHA-1 hash cracker. After two months of evening work, he ended up with 15 Virtex-II Pro FPGAs and 5 Spartan-II ...

Our hash function portfolio is powered by Xiphera’s in-house designed IP cores, optimised for efficiency and high performance in FPGA and ASIC implementations.

SM3 is a hash algorithm initially published by the Office of State ... It is designed with high performance and fast integration into ASIC and FPGA applications.