Accelerate Host Connectivity AMD champions open innovation through its support of CXL, an open industry-standard interconnect between processors and devices such as FPGA-based accelerators.

supporting up to 160 PCIe Gen5 lanes with CXL 2.0, enables storage capacity expansion and high-speed data transfers for networking and storage applications. AMD Epyc Embedded 9005 Series ...

The Panmnesia Compute Express Link (CXL) IP implements all necessary logic for CXL device, host, and switch. The IP supports all features of the CXL 3.1 specifications and is fully backward compatible ...

A new technical paper titled “Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices” was published by researchers at University of Illinois Urbana-Champaign (UIUC) and Intel Labs. “The ...

XConn Technologies has unveiled its Apollo 2 hybrid switch, integrating both Compute Express Link (CXL) 3.1 and PCIe Gen 6.2 on a single chip. Designed to meet AI, machine learning, and ...

New 5th generation embedded CPUs deliver unmatched compute density, energy efficiency, and extended lifecycle ...